![]() You can use this tutorial to perform all the steps in the PCB design process. or its successor.ģ OrCAD Flow Tutorial Contents 1 Introduction to the tutorial Objective of the tutorial Audience Using the tutorial Installing design example Terminology What s next Recommended reading Creating a schematic design Objective Design example Creating a design in Capture Guidelines Creating a project Creating a flat design Creating a hierarchical design Navigating through a hierarchical design Processing a design Adding part references Creating a cross reference report Generating a bill of materials Getting your design ready for simulation Adding Layout specific properties Design rules check Summary What s next Recommended reading Februaruy Product Version 10.0Ĥ OrCAD Flow Tutorial 3 Simulating a design Objective Simulation using PSpice Files generated by PSpice Analysis types Overview of the full adder design Running PSpice Viewing Output Waveforms Performing parametric analysis Adding a variable circuit parameter Adding a Plot Window Template marker Setting up parametric analysis Running the simulation Exporting output waveforms Summary What s next Recommended reading Board design using OrCAD Layout Overview Objective Preparations in Capture Running DRC Creating Layout netlist Creating a board Launch Layout Create the Layout board file Creating a board outline Placing components Routing Manual routing Autorouting using Layout Februaruy Product Version 10.0ĥ OrCAD Flow Tutorial Autorouting using SPECCTRA Post-processing Renaming components Back annotation Cross probing Generating output Output files Reports Summary What s next Recommended reading Glossary Index Februaruy Product Version 10.0Ħ OrCAD Flow Tutorial Februaruy Product Version 10.0ħ Introduction to the tutorial 1 This chapter consists of the following sections: Objective of the tutorial Using the tutorial What s next Recommended reading Objective of the tutorial To enable users to evaluate the power of the OrCAD PCB tools used in the Windows-based PCB design process. Restricted Rights: Use, duplication, or disclosure by the Government is subject to restrictions as set forth in FAR and DFAR et seq. Cadence does not warrant that use of such information will not infringe any third party rights, nor does Cadence assume any liability for damages or costs of any kind that may result from use of such information. Except as may be explicitly set forth in such agreement, Cadence does not make, and expressly disclaims, any representations or warranties as to the completeness, accuracy or usefulness of the information contained in this document. The information contained herein is the proprietary and confidential information of Cadence or its licensors, and is supplied subject to, and may be used only by Cadence s customer in accordance with, a written agreement between Cadence and its customer. Disclaimer: Information in this publication is subject to change without notice and does not represent a commitment on the part of Cadence. Cadence reserves the right to revoke this authorization at any time, and any such use shall be discontinued immediately upon written notice from Cadence. ![]() Any copy of the publication or portion thereof must include all original copyright, trademark, and other proprietary notices and this permission statement and 4. ![]() The publication may not be modified in any way 3. The publication may be used solely for personal, informational, and noncommercial purposes 2. This statement grants you permission to print one (1) hard copy of this publication subject to the following conditions: 1. Except as specified in this permission statement, this publication may not be copied, reproduced, modified, published, uploaded, posted, transmitted, or distributed in any way, without prior written permission from Cadence. Restricted Print Permission: This publication is protected by copyright and any unauthorized use of this publication may violate copyright, trademark, and other laws. For queries regarding Cadence s trademarks, contact the corporate legal department at the address shown above or call All other trademarks are the property of their respective holders. (Cadence) contained in this document are attributed to Cadence with the appropriate symbol. Cadence Design Systems, Inc., 555 River Oaks Parkway, San Jose, CA 95134, USA Trademarks: Trademarks and service marks of Cadence Design Systems, Inc. 1 OrCAD Flow Tutorial Product Version 10.0 Februaruy 2004Ģ Cadence Design Systems, Inc.
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